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usbehci: implement portpower control for rootports

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This commit is contained in:
cinap_lenrek 2024-12-16 01:52:12 +00:00
parent eff4b93652
commit 5028b882da
1 changed files with 24 additions and 7 deletions
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31
sys/src/9/port/usbehci.c
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@ -1639,7 +1639,7 @@ static void
portlend(Ctlr *ctlr, int port, char *ss) portlend(Ctlr *ctlr, int port, char *ss)
{ {
Eopio *opio; Eopio *opio;
ulong s; int s;
opio = ctlr->opio; opio = ctlr->opio;
dprint("ehci %#p port %d: %s speed device: no longer owned\n", dprint("ehci %#p port %d: %s speed device: no longer owned\n",
@ -1648,6 +1648,27 @@ portlend(Ctlr *ctlr, int port, char *ss)
opio->portsc[port-1] = s | Psowner; opio->portsc[port-1] = s | Psowner;
} }
static void
portpower(Hci *hp, int port, int on)
{
Ctlr *ctlr;
Eopio *opio;
int s;
ctlr = hp->aux;
opio = ctlr->opio;
eqlock(&ctlr->portlck);
ilock(ctlr);
s = opio->portsc[port-1] & ~(Pschange|Psstatuschg);
if(on)
s |= Pspower;
else
s &= ~Pspower;
opio->portsc[port-1] = s;
iunlock(ctlr);
qunlock(&ctlr->portlck);
}
static void static void
portenable(Hci *hp, int port, int on) portenable(Hci *hp, int port, int on)
{ {
@ -3221,7 +3242,6 @@ init(Hci *hp)
{ {
Ctlr *ctlr; Ctlr *ctlr;
Eopio *opio; Eopio *opio;
int i;
hp->highspeed = 1; hp->highspeed = 1;
ctlr = hp->aux; ctlr = hp->aux;
@ -3243,10 +3263,6 @@ init(Hci *hp)
/* route all ports to us */ /* route all ports to us */
opio->config = Callmine; opio->config = Callmine;
coherence();
for (i = 0; i < hp->nports; i++)
opio->portsc[i] = Pspower;
iunlock(ctlr); iunlock(ctlr);
if(ehcidebug > 1) if(ehcidebug > 1)
dump(hp); dump(hp);
@ -3263,8 +3279,9 @@ ehcilinkage(Hci *hp)
hp->epread = epread; hp->epread = epread;
hp->epwrite = epwrite; hp->epwrite = epwrite;
hp->seprintep = seprintep; hp->seprintep = seprintep;
hp->portenable = portenable; hp->portpower = portpower;
hp->portreset = portreset; hp->portreset = portreset;
hp->portenable = portenable;
hp->portstatus = portstatus; hp->portstatus = portstatus;
hp->type = "ehci"; hp->type = "ehci";
} }