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837c596bdf
Author | SHA1 | Date | |
---|---|---|---|
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837c596bdf | ||
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5028b882da | ||
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eff4b93652 | ||
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f86cc3e912 | ||
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d38dbf6415 | ||
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2f685dd96b | ||
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473ebd0f9e |
14 changed files with 119 additions and 61 deletions
|
@ -234,14 +234,20 @@ chanwait(Ep *ep, Ctlr *ctlr, Hostchan *hc, int mask)
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int intr, ointr, chan;
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ulong start, now;
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if(waserror()){
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chanhalt(ep, hc);
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nexterror();
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}
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chan = hc - ctlr->regs->hchan;
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for(;;){
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restart:
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tsleep(&ctlr->chanintr[chan], chandone, hc, 1000);
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if((intr = hc->hcint) == 0)
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goto restart;
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if(intr & Chhltd)
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error("channel timeout");
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if(intr & Chhltd){
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poperror();
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return intr;
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}
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ointr = intr;
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now = start = fastticks(0);
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do{
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@ -252,6 +258,7 @@ restart:
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(now - start) > 60)
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dprint("ep%d.%d await %x after %ldµs %x -> %x\n",
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ep->dev->nb, ep->nb, mask, now - start, ointr, intr);
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poperror();
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return intr;
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}
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if((intr & mask) == 0){
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@ -686,7 +693,7 @@ init(Hci *hp)
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dprint("usbdwc: FIFO depth %d sizes rx/nptx/ptx %8.8ux %8.8ux %8.8ux\n",
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n, r->grxfsiz, r->gnptxfsiz, r->hptxfsiz);
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r->hport0 = Prtpwr|Prtconndet|Prtenchng|Prtovrcurrchng;
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r->hport0 = Prtconndet|Prtenchng|Prtovrcurrchng;
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r->gintsts = ~0;
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r->gintmsk = Hcintr;
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r->gahbcfg |= Glblintrmsk;
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@ -982,7 +989,7 @@ portstatus(Hci *hp, int)
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s = r->hport0;
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b = s & (Prtconndet|Prtenchng|Prtovrcurrchng);
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if(b != 0)
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r->hport0 = Prtpwr | b;
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r->hport0 = (s & Prtpwr) | b;
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b = 0;
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if(s & Prtconnsts)
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b |= HPpresent;
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@ -1639,7 +1639,7 @@ static void
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portlend(Ctlr *ctlr, int port, char *ss)
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{
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Eopio *opio;
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ulong s;
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int s;
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opio = ctlr->opio;
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dprint("ehci %#p port %d: %s speed device: no longer owned\n",
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@ -1648,6 +1648,27 @@ portlend(Ctlr *ctlr, int port, char *ss)
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opio->portsc[port-1] = s | Psowner;
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}
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static void
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portpower(Hci *hp, int port, int on)
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{
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Ctlr *ctlr;
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Eopio *opio;
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int s;
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ctlr = hp->aux;
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opio = ctlr->opio;
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eqlock(&ctlr->portlck);
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ilock(ctlr);
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s = opio->portsc[port-1] & ~(Pschange|Psstatuschg);
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if(on)
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s |= Pspower;
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else
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s &= ~Pspower;
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opio->portsc[port-1] = s;
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iunlock(ctlr);
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qunlock(&ctlr->portlck);
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}
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static void
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portenable(Hci *hp, int port, int on)
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{
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@ -3221,7 +3242,6 @@ init(Hci *hp)
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{
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Ctlr *ctlr;
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Eopio *opio;
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int i;
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hp->highspeed = 1;
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ctlr = hp->aux;
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@ -3243,10 +3263,6 @@ init(Hci *hp)
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/* route all ports to us */
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opio->config = Callmine;
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coherence();
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for (i = 0; i < hp->nports; i++)
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opio->portsc[i] = Pspower;
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iunlock(ctlr);
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if(ehcidebug > 1)
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dump(hp);
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@ -3263,8 +3279,9 @@ ehcilinkage(Hci *hp)
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hp->epread = epread;
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hp->epwrite = epwrite;
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hp->seprintep = seprintep;
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hp->portenable = portenable;
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hp->portpower = portpower;
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hp->portreset = portreset;
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hp->portenable = portenable;
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hp->portstatus = portstatus;
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hp->type = "ehci";
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}
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@ -43,6 +43,7 @@ enum {
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CRS = 1<<9, /* Controller Restore State - RW */
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EWE = 1<<10, /* Enable Wrap Event - RW */
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EU3S = 1<<11, /* Enable U3 MFINDEX Stop - RW */
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USBCMD_PRES =0xfffff030,/* Reserved - RsvdP */
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USBSTS = 0x04/4, /* USB Status Register */
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HCH = 1<<0, /* HCHalted - RO */
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@ -54,22 +55,24 @@ enum {
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SRE = 1<<10, /* Save/Restore Error - RW1C */
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CNR = 1<<11, /* Controller Not Ready - RO */
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HCE = 1<<12, /* Host Controller Error - RO */
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USBSTS_PRES =0xffffe002,/* Reserved - RsvdP */
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PAGESIZE = 0x08/4, /* Page Size - RO */
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DNCTRL = 0x14/4, /* Device Notification Control Register - RW */
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DNCTL_PRES =0xffff0000, /* Reserved - RsvdP */
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CRCR = 0x18/4, /* Command Ring Control Register - RW */
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RCS = 1<<0, /* Ring Cycle State - RW */
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CS = 1<<1, /* Command Stop - RW1S */
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CA = 1<<2, /* Command Abort - RW1S */
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CRR = 1<<3, /* Command Ring Running - RO */
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CRCR_PRES = 3<<4, /* Reserved - RsvdP */
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DCBAAP = 0x30/4, // 8
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DCBAAP = 0x30/4, /* 64-bit */
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CONFIG = 0x38/4, /* Configure Register (MaxSlotEn[7:0]) */
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U3E = 1<<8,
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CIE = 1<<9,
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CONFIG_PRES =0xffffff00,/* Reserved - RsvdP */
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/* Port Register Set */
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PORTSC = 0x00/4, /* Port status and Control Register */
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@ -105,10 +108,16 @@ enum {
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/* Interrupter Registers */
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IMAN = 0x00/4, /* Interrupter Management */
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IP = 1<<0, /* Interrupt pending - RW1C */
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IE = 1<<1, /* interrupt enable - RW */
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IMAN_PRES = 0xfffffffc, /* Reserved - RsvdP */
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IMOD = 0x04/4, /* Interrupter Moderation */
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ERSTSZ = 0x08/4, /* Event Ring Segment Table Size */
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ERSTSZ_PRES =0xffff0000,/* Reserved - RsvdP */
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ERSTBA = 0x10/4, /* Event Ring Segment Table Base Address */
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ERSTBA_PRES =0x3f, /* Reserved - RsvdP */
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ERDP = 0x18/4, /* Event Ring Dequeue Pointer */
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EHB = 1<<3, /* Event Handler Busy - RW1C */
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/* TRB flags */
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TR_ENT = 1<<1,
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@ -420,7 +429,7 @@ xhcishutdown(Hci *hp)
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Ctlr *ctlr = hp->aux;
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int i;
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ctlr->opr[USBCMD] = 0;
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ctlr->opr[USBCMD] &= USBCMD_PRES;
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for(i=0; (ctlr->opr[USBSTS] & HCH) == 0 && i < 10; i++)
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delay(10);
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intrdisable(hp->irq, hp->interrupt, hp, hp->tbdf, hp->type);
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@ -470,7 +479,7 @@ xhciinit(Hci *hp)
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for(i=0; (ctlr->opr[USBSTS] & CNR) != 0 && i<100; i++)
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tsleep(&up->sleep, return0, nil, 10);
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ctlr->opr[USBCMD] = HCRST;
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ctlr->opr[USBCMD] = HCRST | (ctlr->opr[USBCMD] & USBCMD_PRES);
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/* some intel controllers require 1ms delay after reset */
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tsleep(&up->sleep, return0, nil, 1);
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@ -544,7 +553,8 @@ xhciinit(Hci *hp)
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for(i=1; i<=ctlr->nslots; i++)
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ctlr->dcba[i] = 0;
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ctlr->opr[CONFIG] = (ctlr->opr[CONFIG] & ~(CIE|U3E|0xFF)) | ctlr->nslots; /* MaxSlotsEn */
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/* MaxSlotsEn */
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ctlr->opr[CONFIG] = ctlr->nslots | (ctlr->opr[CONFIG] & CONFIG_PRES);
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dmaflush(1, ctlr->dcba, (1+ctlr->nslots)*sizeof(ctlr->dcba[0]));
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setrptr(&ctlr->opr[DCBAAP], (*ctlr->dmaaddr)(ctlr->dcba));
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@ -552,16 +562,18 @@ xhciinit(Hci *hp)
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initring(ctlr, ctlr->cr, 8); /* 256 entries */
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ctlr->cr->id = 0;
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ctlr->cr->doorbell = &ctlr->dba[0];
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setrptr(&ctlr->opr[CRCR], resetring(ctlr->cr));
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setrptr(&ctlr->opr[CRCR], resetring(ctlr->cr) |
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(ctlr->opr[CRCR] & CRCR_PRES));
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for(i=0; i<ctlr->nintrs; i++){
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u32int *irs = &ctlr->rts[IR0 + i*8];
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if(i >= nelem(ctlr->er)){
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irs[ERSTSZ] = 0; /* disable ring */
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irs[IMAN] = 1;
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/* disable ring */
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irs[ERSTSZ] = 0 | (irs[ERSTSZ] & ERSTSZ_PRES);
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irs[IMAN] = irs[IMAN] & (IP | IMAN_PRES);
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irs[IMOD] = 0;
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setrptr(&irs[ERSTBA], 0);
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setrptr(&irs[ERSTBA], irs[ERSTBA] & ERSTBA_PRES);
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setrptr(&irs[ERDP], 0);
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continue;
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}
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@ -576,19 +588,22 @@ xhciinit(Hci *hp)
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ctlr->erst[i][3] = 0;
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dmaflush(1, ctlr->erst[i], 4*4);
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irs[ERSTSZ] = 1; /* just one segment */
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irs[IMAN] = 3;
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/* just one segment */
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irs[ERSTSZ] = 1 | (irs[ERSTSZ] & ERSTSZ_PRES);
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irs[IMAN] = IE | (irs[IMAN] & (IP | IMAN_PRES));
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irs[IMOD] = 0;
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setrptr(&irs[ERSTBA], (*ctlr->dmaaddr)(ctlr->erst[i]));
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setrptr(&irs[ERDP], (*ctlr->dmaaddr)(ctlr->er[i].base) | (1<<3));
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setrptr(&irs[ERSTBA], (*ctlr->dmaaddr)(ctlr->erst[i]) |
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(irs[ERSTBA] & ERSTBA_PRES));
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setrptr(&irs[ERDP], (*ctlr->dmaaddr)(ctlr->er[i].base) | EHB);
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}
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poperror();
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ctlr->µframe = 0;
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ctlr->opr[USBSTS] = ctlr->opr[USBSTS] & (HSE|EINT|PCD|SRE);
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ctlr->opr[USBSTS] = ctlr->opr[USBSTS] & (HSE|EINT|PCD|SRE | USBSTS_PRES);
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coherence();
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ctlr->opr[USBCMD] = RUNSTOP|INTE|HSEE|EWE;
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ctlr->opr[USBCMD] = RUNSTOP|INTE|HSEE|EWE | (ctlr->opr[USBCMD] & USBCMD_PRES);
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for(i=0; (ctlr->opr[USBSTS] & (CNR|HCH)) != 0 && i<100; i++)
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tsleep(&up->sleep, return0, nil, 10);
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@ -613,6 +628,10 @@ recover(void *arg)
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;
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while(!needrecover(ctlr))
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tsleep(&ctlr->recover, needrecover, ctlr, 1000);
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print("usbxhci %llux: need recover: USBSTS=%ux, er stopped=%d\n",
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ctlr->base, ctlr->opr[USBSTS], ctlr->er->stopped);
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(*hp->shutdown)(hp);
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/*
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@ -654,12 +673,11 @@ recover(void *arg)
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qlock(&ctlr->cmdlock);
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release(ctlr);
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if(waserror()) {
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print("xhci recovery failed: %s\n", up->errstr);
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print("usbxhci %llux: recovery failed: %s\n", ctlr->base, up->errstr);
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} else {
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(*hp->init)(hp);
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poperror();
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}
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|
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qunlock(&ctlr->cmdlock);
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qunlock(&ctlr->slotlock);
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@ -881,7 +899,7 @@ interrupt(Ureg*, void *arg)
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irs = &ctlr->rts[IR0];
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x = irs[IMAN];
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if(x & 1) irs[IMAN] = x & 3;
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if(x & IP) irs[IMAN] = x;
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|
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for(x = ring->rp;; x=++ring->rp){
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td = ring->base + 4*(x & ring->mask);
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@ -908,8 +926,8 @@ interrupt(Ureg*, void *arg)
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(ctlr->µframe+(1<<14) & ~((1<<14)-1));
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break;
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case ER_HCE:
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iprint("xhci: host controller error: %ux %ux %ux %ux\n",
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td[0], td[1], td[2], td[3]);
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iprint("usbxhci %llux: host controller error: %ux %ux %ux %ux\n",
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ctlr->base, td[0], td[1], td[2], td[3]);
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ctlr->er->stopped = 1;
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wakeup(&ctlr->recover);
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return;
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@ -919,12 +937,12 @@ interrupt(Ureg*, void *arg)
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case ER_DOORBELL:
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case ER_DEVNOTE:
|
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default:
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iprint("xhci: event %ud: %ux %ux %ux %ux\n",
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x, td[0], td[1], td[2], td[3]);
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iprint("usbxhci %llux: event %ud: %ux %ux %ux %ux\n",
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ctlr->base, x, td[0], td[1], td[2], td[3]);
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}
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}
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setrptr(&irs[ERDP], (*ctlr->dmaaddr)(td) | (1<<3));
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setrptr(&irs[ERDP], (*ctlr->dmaaddr)(td) | EHB);
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}
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static void
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@ -1855,7 +1873,7 @@ xhcialloc(u32int *mmio, u64int base, u64int size)
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|
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ctlr = malloc(sizeof(Ctlr));
|
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if(ctlr == nil){
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print("usbxhci: no memory for controller\n");
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print("usbxhci %llux: no memory for controller\n", base);
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return nil;
|
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}
|
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ctlr->mmio = mmio;
|
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|
|
|
@ -114,8 +114,9 @@ for(m in $cleanpaths){
|
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for(ours in $dirtypaths){
|
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common=$gitfs/object/$orig/tree/$ours
|
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theirs=$gitfs/object/$base/tree/$ours
|
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merge1 $ours $ours $common $theirs || st=$status
|
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if(! ~ $#st 1)
|
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merge1 $ours $ours $common $theirs
|
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st=$status
|
||||
if(! ~ $st '')
|
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>[1=2] echo merge failed $ours: $st
|
||||
}
|
||||
if(~ $new */*)
|
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|
|
|
@ -164,7 +164,7 @@ out:
|
|||
* don't call it non-existent if it's not ours
|
||||
* (unless we're a resolver).
|
||||
*/
|
||||
if(err == Rname && (!inmyarea(dp->name) || cfg.resolver))
|
||||
if(err == Rname && (!inmyarea(dp->name, nil) || cfg.resolver))
|
||||
err = Rserver;
|
||||
dp->respcode = err;
|
||||
}
|
||||
|
@ -848,7 +848,7 @@ baddelegation(RR *rp, RR *nsrp, uchar *addr)
|
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for(nt = mydoms; nt != nil; nt = nt->entry)
|
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if(rp->host && cistrcmp(rp->host->name, nt->val) == 0)
|
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break;
|
||||
if(nt == nil || inmyarea(rp->owner->name))
|
||||
if(nt == nil || inmyarea(rp->owner->name, nil))
|
||||
return 0;
|
||||
dnslog("bad delegation %R from %I/%s; "
|
||||
"no further logging of them",
|
||||
|
|
|
@ -526,7 +526,7 @@ dnauthdb(void)
|
|||
|
||||
for(i = 0; i < HTLEN; i++)
|
||||
for(dp = ht[i]; dp; dp = dp->next){
|
||||
area = inmyarea(dp->name);
|
||||
area = inmyarea(dp->name, nil);
|
||||
l = &dp->rr;
|
||||
for(rp = *l; rp; rp = *l){
|
||||
if(rp->db){
|
||||
|
@ -539,7 +539,7 @@ dnauthdb(void)
|
|||
if(rp->ttl < minttl)
|
||||
rp->ttl = minttl;
|
||||
rp->auth = 1;
|
||||
} else if(rp->type == Tns && inmyarea(rp->host->name))
|
||||
} else if(rp->type == Tns && inmyarea(rp->host->name, nil))
|
||||
rp->auth = 1;
|
||||
} else if(area){
|
||||
/* no outside spoofing */
|
||||
|
@ -707,7 +707,7 @@ rrattach(RR *rp, int auth)
|
|||
next = rp->next;
|
||||
rp->next = nil;
|
||||
if(rp->type == Tall || rp->type == Topt || !rrsupported(rp->type)
|
||||
|| cfg.cachedb && !rp->db && inmyarea(rp->owner->name))
|
||||
|| cfg.cachedb && !rp->db && inmyarea(rp->owner->name, nil))
|
||||
rrfree(rp);
|
||||
else
|
||||
rrattach1(rp, auth);
|
||||
|
|
|
@ -26,17 +26,22 @@ nameinarea(char *name, Area *s)
|
|||
* true if a name is in our area
|
||||
*/
|
||||
Area*
|
||||
inmyarea(char *name)
|
||||
inmyarea(char *name, Area **delegation)
|
||||
{
|
||||
Area *s, *d;
|
||||
|
||||
s = nameinarea(name, owned);
|
||||
if(s == nil)
|
||||
if(s == nil){
|
||||
if(delegation)
|
||||
*delegation = nil;
|
||||
return nil;
|
||||
}
|
||||
d = nameinarea(name, delegated);
|
||||
if(d && d->len > s->len)
|
||||
if(delegation)
|
||||
*delegation = d;
|
||||
if(d != nil && d->len > s->len)
|
||||
return nil;
|
||||
return s; /* name is in owned area `s' and not in a delegated subarea */
|
||||
return s; /* name is in owned area `s' and not in a delegated subarea `d' */
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -26,7 +26,7 @@ dnnotify(DNSmsg *reqp, DNSmsg *repp, Request *req)
|
|||
return;
|
||||
|
||||
/* is it something we care about? */
|
||||
a = inmyarea(repp->qd->owner->name);
|
||||
a = inmyarea(repp->qd->owner->name, nil);
|
||||
if(a == nil)
|
||||
return;
|
||||
|
||||
|
|
|
@ -403,7 +403,7 @@ dnresolve1(char *name, int class, int type, Request *req, int depth, int recurse
|
|||
* if the domain name is within an area of ours,
|
||||
* we should have found its data in memory by now.
|
||||
*/
|
||||
area = inmyarea(dp->name);
|
||||
area = inmyarea(dp->name, nil);
|
||||
if (area || strncmp(dp->name, "local#", 6) == 0)
|
||||
return nil;
|
||||
|
||||
|
|
|
@ -489,7 +489,7 @@ extern Area *delegated;
|
|||
extern Area *owned;
|
||||
void addarea(RR *rp, Ndbtuple *t);
|
||||
void freeareas(Area**);
|
||||
Area* inmyarea(char*);
|
||||
Area* inmyarea(char*, Area**);
|
||||
|
||||
/* dblookup.c */
|
||||
int baddelegation(RR*, RR*, uchar*);
|
||||
|
|
|
@ -14,7 +14,7 @@ dnserver(DNSmsg *reqp, DNSmsg *repp, Request *req, uchar *srcip, int rcode)
|
|||
{
|
||||
char tname[32], *cp;
|
||||
DN *nsdp;
|
||||
Area *myarea;
|
||||
Area *myarea, *delegation;
|
||||
RR *rp, *neg;
|
||||
|
||||
repp->id = reqp->id;
|
||||
|
@ -49,7 +49,7 @@ dnserver(DNSmsg *reqp, DNSmsg *repp, Request *req, uchar *srcip, int rcode)
|
|||
return;
|
||||
}
|
||||
|
||||
myarea = inmyarea(repp->qd->owner->name);
|
||||
myarea = inmyarea(repp->qd->owner->name, &delegation);
|
||||
if(myarea){
|
||||
if(repp->qd->type == Tixfr || repp->qd->type == Taxfr){
|
||||
if(debug)
|
||||
|
@ -64,9 +64,15 @@ dnserver(DNSmsg *reqp, DNSmsg *repp, Request *req, uchar *srcip, int rcode)
|
|||
} else {
|
||||
if(cfg.nonrecursive
|
||||
|| cfg.localrecursive && !localip(srcip)){
|
||||
/* we don't recurse and we're not authoritative */
|
||||
if(delegation == nil){
|
||||
/*
|
||||
* we don't recurse and we're not authoritative
|
||||
* nor lies the domain in a delegated sub area.
|
||||
*/
|
||||
setercode(repp, Rrefused);
|
||||
return;
|
||||
}
|
||||
neg = nil;
|
||||
} else {
|
||||
repp->flags |= Fcanrec;
|
||||
if(reqp->flags & Frecurse){
|
||||
|
|
|
@ -56,8 +56,9 @@ enum
|
|||
Pconfigured,
|
||||
|
||||
/* Delays, timeouts (ms) */
|
||||
Resetdelay = 20, /* how much to wait after a reset */
|
||||
Resumedelay = 20, /* how much to wait after a resume */
|
||||
Rootresetdelay = 100, /* how much to wait after a root port reset (50ms by standard) */
|
||||
Portresetdelay = 50, /* how much to wait after a hub port reset (20ms by standard) */
|
||||
Resumedelay = 50, /* how much to wait after a resume (20ms by standard) */
|
||||
Powerdelay = 100, /* after powering up ports */
|
||||
Pollms = 250, /* port poll interval */
|
||||
|
||||
|
|
|
@ -452,7 +452,7 @@ portattach(Hub *h, int p)
|
|||
dprint(2, "%s: %s: port %d: set reset: %r\n", argv0, d->dir, p);
|
||||
return -1;
|
||||
}
|
||||
sleep(Resetdelay);
|
||||
sleep(d->depth<0? Rootresetdelay: Portresetdelay);
|
||||
if((sts = portstatus(h, p)) == -1)
|
||||
return -1;
|
||||
sp = "full";
|
||||
|
|
|
@ -159,8 +159,9 @@ nsub(Mesg *m)
|
|||
n = 0;
|
||||
for(i = 0; i < m->nchild; i++){
|
||||
c = m->child[i];
|
||||
n += nsub(c);
|
||||
if(!(c->state & (Sdummy|Shide)))
|
||||
n += nsub(c)+1;
|
||||
n++;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
@ -183,7 +184,9 @@ mesglineno(Mesg *msg, int *depth)
|
|||
for(i = 0; i < p->nchild; i++){
|
||||
if(p->child[i] == m)
|
||||
break;
|
||||
o += nsub(p->child[i]) + 1;
|
||||
o += nsub(p->child[i]);
|
||||
if(!(p->state & (Sdummy|Shide)))
|
||||
o++;
|
||||
}
|
||||
if(!(p->state & (Sdummy|Shide))){
|
||||
o++;
|
||||
|
|
Loading…
Reference in a new issue