cirno/plan9port
1
0
Fork 0
mirror of https://github.com/9fans/plan9port.git synced 2025-01-12 11:10:07 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

add registers

Browse source
This commit is contained in:
rsc 2004-04-21 20:04:18 +00:00
parent a3785ca2cc
commit 4a64a77bd3
1 changed files with 30 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

30
src/cmd/acid/list.c
View file

@ -191,6 +191,32 @@ listvar(char *s, long v)
return tl;
}
static List*
listregisters(Map *map, Regs *regs)
{
List **tail, *l2, *l;
Regdesc *rp;
ulong v;
l2 = 0;
tail = &l2;
for(rp=mach->reglist; rp->name; rp++){
if(rget(regs, rp->name, &v) < 0)
continue;
l = al(TSTRING);
l->store.fmt = 's';
l->store.u.string = strnode(rp->name);
*tail = l;
tail = &l->next;
l = al(TINT);
l->store.fmt = 'X';
l->store.u.ival = v;
*tail = l;
tail = &l->next;
}
return l2;
}
static List*
listlocals(Map *map, Regs *regs, Symbol *fn, int class)
{
@ -266,5 +292,9 @@ trlist(Map *map, Regs *regs, ulong pc, ulong callerpc, Symbol *sym, int depth)
if(sym)
l->store.u.l = listautos(map, regs, sym);
l->next = al(TLIST); /* make list of registers */
l = l->next;
l->store.u.l = listregisters(map, regs);
return depth<40;
}