mirror of
https://github.com/9fans/plan9port.git
synced 2025-01-12 11:10:07 +00:00
SunOS fixes (thanks Aram Hăvărneanu)
R=rsc, rsc http://codereview.appspot.com/4271084
This commit is contained in:
parent
4e247f10fa
commit
af0dea4531
5 changed files with 97 additions and 97 deletions
2
bin/9c
2
bin/9c
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@ -46,7 +46,7 @@ quiet()
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grep -v '__p9l_autolib_' $1 |
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egrep -v "$ignore" |
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sed 's/ .first use in this function.$//; s/\"\([^\"][^\"]*\)\", line \([0-9][0-9]*\)/\1:\2/g' |
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uniq 1>&2
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$(which uniq) 1>&2 # avoid built-in uniq on SunOS
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}
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useclang()
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@ -1324,21 +1324,21 @@ lookup(char *s, int doreset)
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char *ngctypes[] =
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{
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[Galaxy] "Gx",
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[PlanetaryN] "Pl",
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[OpenCl] "OC",
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[GlobularCl] "Gb",
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[DiffuseN] "Nb",
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[NebularCl] "C+N",
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[Asterism] "Ast",
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[Knot] "Kt",
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[Triple] "***",
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[Double] "D*",
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[Single] "*",
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[Uncertain] "?",
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[Nonexistent] "-",
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[Unknown] " ",
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[PlateDefect] "PD"
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[Galaxy] = "Gx",
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[PlanetaryN] = "Pl",
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[OpenCl] = "OC",
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[GlobularCl] = "Gb",
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[DiffuseN] = "Nb",
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[NebularCl] = "C+N",
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[Asterism] = "Ast",
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[Knot] = "Kt",
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[Triple] = "***",
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[Double] = "D*",
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[Single] = "*",
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[Uncertain] = "?",
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[Nonexistent] = "-",
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[Unknown] = " ",
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[PlateDefect] = "PD"
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};
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char*
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@ -1,66 +1,66 @@
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/*
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* mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
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*
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* p += b*m
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*
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* each step look like:
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* hi,lo = m*b[i]
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* lo += oldhi + carry
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* hi += carry
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* p[i] += lo
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* oldhi = hi
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*
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* the registers are:
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* hi = DX - constrained by hardware
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* lo = AX - constrained by hardware
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* b+n = SI - can't be BP
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* p+n = DI - can't be BP
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* i-n = BP
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* m = BX
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* oldhi = CX
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*
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*/
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#
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# mpvecdigmul(mpdigit *b, int n, mpdigit m, mpdigit *p)
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#
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# p += b*m
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#
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# each step look like:
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# hi,lo = m*b[i]
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# lo += oldhi + carry
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# hi += carry
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# p[i] += lo
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# oldhi = hi
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#
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# the registers are:
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# hi = DX - constrained by hardware
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# lo = AX - constrained by hardware
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# b+n = SI - can't be BP
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# p+n = DI - can't be BP
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# i-n = BP
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# m = BX
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# oldhi = CX
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#
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.text
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.p2align 2,0x90
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.globl mpvecdigmuladd
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mpvecdigmuladd:
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/* Prelude */
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pushl %ebp /* save on stack */
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# Prelude
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pushl %ebp # save on stack
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pushl %ebx
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pushl %esi
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pushl %edi
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leal 20(%esp), %ebp /* %ebp = FP for now */
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movl 0(%ebp), %esi /* b */
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movl 4(%ebp), %ecx /* n */
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movl 8(%ebp), %ebx /* m */
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movl 12(%ebp), %edi /* p */
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leal 20(%esp), %ebp # %ebp = FP for now
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movl 0(%ebp), %esi # b
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movl 4(%ebp), %ecx # n
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movl 8(%ebp), %ebx # m
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movl 12(%ebp), %edi # p
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movl %ecx, %ebp
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negl %ebp /* BP = -n */
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negl %ebp # BP = -n
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shll $2, %ecx
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addl %ecx, %esi /* SI = b + n */
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addl %ecx, %edi /* DI = p + n */
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addl %ecx, %esi # SI = b + n
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addl %ecx, %edi # DI = p + n
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xorl %ecx, %ecx
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_muladdloop:
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movl (%esi, %ebp, 4), %eax /* lo = b[i] */
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mull %ebx /* hi, lo = b[i] * m */
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addl %ecx,%eax /* lo += oldhi */
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movl (%esi, %ebp, 4), %eax # lo = b[i]
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mull %ebx # hi, lo = b[i] * m
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addl %ecx,%eax # lo += oldhi
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jae _muladdnocarry1
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incl %edx /* hi += carry */
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incl %edx # hi += carry
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_muladdnocarry1:
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addl %eax, (%edi, %ebp, 4) /* p[i] += lo */
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addl %eax, (%edi, %ebp, 4) # p[i] += lo
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jae _muladdnocarry2
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incl %edx /* hi += carry */
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incl %edx # hi += carry
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_muladdnocarry2:
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movl %edx, %ecx /* oldhi = hi */
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incl %ebp /* i++ */
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movl %edx, %ecx # oldhi = hi
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incl %ebp # i++
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jnz _muladdloop
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xorl %eax, %eax
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addl %ecx, (%edi, %ebp, 4) /* p[n] + oldhi */
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adcl %eax, %eax /* return carry out of p[n] */
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addl %ecx, (%edi, %ebp, 4) # p[n] + oldhi
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adcl %eax, %eax # return carry out of p[n]
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/* Postlude */
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# Postlude
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popl %edi
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popl %esi
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popl %ebx
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@ -1,54 +1,54 @@
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/*
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* mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
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*
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* p -= b*m
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*
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* each step look like:
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* hi,lo = m*b[i]
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* lo += oldhi + carry
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* hi += carry
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* p[i] += lo
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* oldhi = hi
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*
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* the registers are:
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* hi = DX - constrained by hardware
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* lo = AX - constrained by hardware
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* b = SI - can't be BP
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* p = DI - can't be BP
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* i = BP
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* n = CX - constrained by LOOP instr
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* m = BX
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* oldhi = EX
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*
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*/
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#
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# mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
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#
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# p -= b*m
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#
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# each step look like:
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# hi,lo = m*b[i]
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# lo += oldhi + carry
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# hi += carry
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# p[i] += lo
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# oldhi = hi
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#
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# the registers are:
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# hi = DX - constrained by hardware
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# lo = AX - constrained by hardware
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# b = SI - can't be BP
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# p = DI - can't be BP
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# i = BP
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# n = CX - constrained by LOOP instr
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# m = BX
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# oldhi = EX
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#
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.text
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.p2align 2,0x90
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.globl mpvecdigmulsub
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mpvecdigmulsub:
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/* Prelude */
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pushl %ebp /* save on stack */
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# Prelude
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pushl %ebp # save on stack
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pushl %ebx
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pushl %esi
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pushl %edi
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leal 20(%esp), %ebp /* %ebp = FP for now */
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movl 0(%ebp), %esi /* b */
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movl 4(%ebp), %ecx /* n */
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movl 8(%ebp), %ebx /* m */
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movl 12(%ebp), %edi /* p */
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leal 20(%esp), %ebp # %ebp = FP for now
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movl 0(%ebp), %esi # b
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movl 4(%ebp), %ecx # n
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movl 8(%ebp), %ebx # m
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movl 12(%ebp), %edi # p
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xorl %ebp, %ebp
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pushl %ebp
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_mulsubloop:
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movl (%esi, %ebp, 4),%eax /* lo = b[i] */
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mull %ebx /* hi, lo = b[i] * m */
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addl 0(%esp), %eax /* lo += oldhi */
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movl (%esi, %ebp, 4),%eax # lo = b[i]
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mull %ebx # hi, lo = b[i] * m
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addl 0(%esp), %eax # lo += oldhi
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jae _mulsubnocarry1
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incl %edx /* hi += carry */
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incl %edx # hi += carry
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_mulsubnocarry1:
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subl %eax, (%edi, %ebp, 4)
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jae _mulsubnocarry2
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incl %edx /* hi += carry */
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incl %edx # hi += carry
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_mulsubnocarry2:
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movl %edx, 0(%esp)
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incl %ebp
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_mulsubnocarry3:
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movl $1, %eax
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done:
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/* Postlude */
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# Postlude
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popl %edi
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popl %esi
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popl %ebx
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@ -158,8 +158,8 @@ _sha1block:
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BODY0(0,FN1,0x5a827999,%eax,TMP1(%esp),%ecx,%edx,%esi)
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addl $4, %ebx
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MOVL %ebx, DATA(%esp) /* data */
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MOVL TMP1(%esp),%ebx
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movl %ebx, DATA(%esp) /* data */
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movl TMP1(%esp),%ebx
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BODY(4,FN1,0x5a827999,%esi,%eax,%ebx,%ecx,%edx)
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BODY(8,FN1,0x5a827999,%edx,%esi,%eax,%ebx,%ecx)
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